1. Field
The present embodiment relates to a power supply circuit, a power supply control circuit and a power supply control method.
2. Description of the Related Art
In a portable electronics device (such as a notebook type personal computer), a battery is used as a power supply. Generally, since a voltage supplied by a battery becomes lower as discharge of the battery proceeds, a DC-DC converter is mounted in an electronics device for keeping the voltage used in the electronics device constant. Also, along with increase in speed, increase in degree of integration and decrease in power consumption of semiconductor devices, lowering of a power supply voltage in semiconductor devices is in progress, but in an electronics device constituted by combining a plurality of semiconductor devices, a different power supply voltage is often required for each of the semiconductor devices. In such a case, there exist not one type but two or more types of voltages used in the electronics device, and hence the same number of DC-DC converters as the number of types of voltages used in the electronics device are mounted in the electronics device.
Incidentally, when there exists a plurality of voltages used in an electronics device and a power supply circuit using a plurality of DC-DC converters is mounted in the electronics device, there is a risk that latch-up occurs in a semiconductor device which constitutes the electronics device and leads to burn-out if a start sequence and a stop sequence among DC-DC converters is not considered. Accordingly, normally a sequence control circuit which transmits/receives a control signal to/from each of the DC-DC converters is provided in the power supply circuit for controlling the start sequence and the stop sequence between the DC-DC converters.
FIG. 1 shows a first structure example of a power supply circuit. A power supply circuit PWA is constituted including DC-DC converters CNVA1 to CNVA3 which generate output voltages VO1 to VO3 from the input voltage VI, and a sequence control circuit SC which controls start/stop of the DC-DC converters CNVA1 to CNVA3. For example, a rated value for the output voltage VO1 is 5.0 V, a rated value for the output voltage VO2 is 3.0 V, and a rated value for the output voltage VO3 is 1.8 V.
The DC-DC converter CNVA1 makes the output voltage VO1 start to rise in response to a rising transition (transition from a low level to a high level) of a control signal line PON1, and sets a control signal line PGOOD1 to a high level along with completion of rising of the output voltage VO1. Also, the DC-DC converter CNVA1 makes the output voltage VO1 start to fall in response to a falling transition (transition from a high level to a low level) of the control signal line PON1, and sets the control signal line PGOOD1 to a low level along with completion of falling of the output voltage VO1.
The DC-DC converter CNVA2 makes the output voltage VO2 start to rise in response to a rising transition of a control signal line PON2, and sets a control signal line PGOOD2 to a high level along with completion of rising of the output voltage VO2. Also, the DC-DC converter CNVA2 makes the output voltage VO2 start to fall in response to a falling transition of the control signal line PON2, and sets the control signal line PGOOD2 to a low level along with completion of falling of the output voltage VO2.
The DC-DC converter CNVA3 makes the output voltage VO3 start to rise in response to a rising transition of a control signal line PON3, and sets a control signal line PGOOD3 to a high level along with completion of rising of the output voltage VO3. Also, the DC-DC converter CNVA3 makes the output voltage VO3 start to fall in response to a falling transition of the control signal line PON3, and sets the control signal line PGOOD3 to a low level along with completion of falling of the output voltage VO3.
The sequence control circuit SC sets the control signal line PON1 to a high level in response to a rising transition of a control signal line PON. Note that the control signal line PON is set to a high level when requesting a power-on to the power supply circuit PWA, and is set to a low level when requesting a power-off to the power supply circuit PWA. The sequence control circuit SC sets the control signal line PON2 to a high level in response to a rising transition of the control signal line PGOOD1. The sequence control circuit SC sets the control signal line PON3 to a high level in response to a rising transition of the control signal line PGOOD2.
Also, the sequence control circuit SC sets the control signal line PON3 to a low level in response to a falling transition of the control signal line PON. The sequence control circuit SC sets the control signal line PON2 to a low level in response to a falling transition of the control signal line PGOOD3. The sequence control circuit SC sets the control signal line PON1 to a low level in response to a falling transition of the control signal line PGOOD2.
FIG. 2 shows an overview of rising/falling of the output voltages in the power supply circuit of FIG. 1. When the control signal line PON is set to a high level at time t1 (when a power-on is requested to the power supply circuit PWA), the sequence control circuit SC sets the control signal line PON1 to a high level. Accordingly, rising of the output voltage VO1 of the DC-DC converter CNVA1 is started. When the rising of the output voltage VO1 of the DC-DC converter CNVA1 completes at time t2, the DC-DC converter CNVA1 sets the control signal line PGOOD1 to a high level. Along with this, the sequence control circuit SC sets the control signal line PON2 to a high level. Accordingly, rising of the output voltage VO2 of the DC-DC converter CNVA2 is started. When the rising of the output voltage VO2 of the DC-DC converter CNVA2 completes at time t3, the DC-DC converter CNVA2 sets the control signal line PGOOD2 to a high level. Along with this, the sequence control circuit SC sets the control signal line PON3 to a high level. Accordingly, rising of the output voltage VO3 of the DC-DC converter CNVA3 is started. Then, at time t4, the rising of the output voltage VO3 of the DC-DC converter CNVA3 completes.
At time t5, when the control signal line PON is set to a low level (when a power-off is requested to the power supply circuit PWA), the sequence control circuit SC sets the control signal line PO3 to a low level. Accordingly, falling of the output voltage VO3 of the DC-DC converter CNVA3 is started. When the falling of the output voltage VO3 of the DC-DC converter CNVA3 completes at time t6, the DC-DC converter CNVA3 sets the control signal line PGOOD3 to a low level. Along with this, the sequence control circuit SC sets the control signal line PON2 to a low level. Accordingly, falling of the output voltage VO2 of the DC-DC converter CNVA2 is started. When the falling of the output voltage VO2 of the DC-DC converter CNVA2 completes at time t7, the DC-DC converter CNVA2 sets the control signal line PGOOD2 to a low level. Along with this, the sequence control circuit SC sets the control signal line PON1 to a low level. Accordingly, falling of the output voltage VO1 of the DC-DC converter CNVA1 is started. Then, at time t8, the falling of the output voltage VO1 of the DC-DC converter CNVA1 completes.
In the power supply circuit PWA as described above, the sequence control circuit SC is provided for controlling a start sequence and a stop sequence among the DC-DC converters CNVA1 to CNVA3, and it is necessary to provide a large number of control signal lines between the sequence control circuit SC and the DC-DC converters CNVA1 to CNVA3. To decrease the number of control signal lines by eliminating the sequence control circuit, it is conceivable to cascade-connect the DC-DC converters via the control signal lines.
FIG. 3 shows a second structure example of a power supply circuit. A power supply circuit PWB is constituted including DC-DC converters CNVB1 to CNVB3 which generate output voltages VO1 to VO3 from the input voltage VI. For example, a rated value for the output voltage VO1 is 5.0 V, a rated value for the output voltage VO2 is 3.0 V, and a rated value for the output voltage VO3 is 1.8 V.
The DC-DC converter CNVB1 makes the output voltage VO1 start to rise in response to a rising transition of a control signal line PON, and sets a control signal line PGOOD1 to a high level along with completion of rising of the output voltage VO1. Also, the DC-DC converter CNVB1 makes the output voltage VO1 start to fall in response to a falling transition of the control signal line PON, and sets the control signal line PGOOD1 to a low level along with completion of falling of the output voltage VO1. Note that the control signal line PON is set to a high level when requesting a power-on to the power supply circuit PWB, and is set to a low level when requesting a power-off to the power supply circuit PWB.
The DC-DC converter CNVB2 makes the output voltage VO2 start to rise in response to a rising transition of a control signal line PGOOD1, and sets a control signal line PGOOD2 to a high level along with completion of rising of the output voltage VO2. Also, the DC-DC converter CNVB2 makes the output voltage VO2 start to fall in response to a falling transition of the control signal line PGOOD1, and sets the control signal line PGOOD2 to a low level along with completion of falling of the output voltage VO2.
The DC-DC converter CNVB3 makes the output voltage VO3 start to rise in response to a rising transition of a control signal line PGOOD2, and sets a control signal line PGOOD3 to a high level along with completion of rising of the output voltage VO3. Also, the DC-DC converter CNVB3 makes the output voltage VO3 start to fall in response to a falling transition of the control signal line PGOOD2, and sets the control signal line PGOOD3 to a low level along with completion of falling of the output voltage VO3.
FIG. 4 shows an overview of rising/falling of the output voltages in the power supply circuit of FIG. 3. When the control signal line PON is set to a high level at time t1 (when a power-on is requested to the power supply circuit PWB), rising of the output voltage VO1 of the DC-DC converter CNVB1 is started. When the rising of the output voltage VO1 of the DC-DC converter CNVB1 completes at time t2, the DC-DC converter CNVB1 sets the control signal line PGOOD1 to a high level. Accordingly, rising of the output voltage VO2 of the DC-DC converter CNVB2 is started. When the rising of the output voltage VO2 of the DC-DC converter CNVB2 completes at time t3, the DC-DC converter CNVB2 sets the control signal line PGOOD2 to a high level. Accordingly, rising of the output voltage VO3 of the DC-DC converter CNVB3 is started. Then, at time t4, the rising of the output voltage VO3 of the DC-DC converter CNVB3 completes.
At time t5, when the control signal line PON is set to a low level (when a power-off is requested to the power supply circuit PWB), falling of the output voltage VO1 of the DC-DC converter CNVB1 is started. When the falling of the output voltage VO1 of the DC-DC converter CNVB1 completes at time t6, the DC-DC converter CNVB1 sets the control signal line PGOOD1 to a low level. Accordingly, falling of the output voltage VO2 of the DC-DC converter CNVB2 is started. When the falling of the output voltage VO2 of the DC-DC converter CNVB2 completes at time t7, the DC-DC converter CNVB2 sets the control signal line PGOOD2 to a low level. Accordingly, falling of the output voltage VO3 of the DC-DC converter CNVB3 is started. Then, at time t8, the failing of the output voltage VO3 of the DC-DC converter CNVB3 completes.
As described above, in the power supply circuit PWB constituted by simply cascade-connecting the DC-DC converters CNVB1 to CNVB3 via the control signal lines, the start sequence and the stop sequence among the DC-DC converters CNVB1 to CNVB3 become the same. The control of the start sequence and the stop sequence among the DC-DC converters aims at prevention of latch-up or the like in a semiconductor device which uses the output voltage of the DC-DC converter, and thus it is required that the start sequence and the stop sequence among the DC-DC converters are in reverse as in the power supply circuit PWA (FIG. 2). Therefore, the control of the start sequence and the stop sequence between the DC-DC converters CNVB1 to CNVB3 realized by the power supply circuit PWB makes no sense.
FIG. 5 shows a third structure example of a power supply circuit. A power supply circuit PWC is constituted including DC-DC converters CNVC1 to CNVC3 which generate output voltages VO1 to VO3 from the input voltage VI. For example, a rated value for the output voltage VO1 is 5.0 V, a rated value for the output voltage VO2 is 3.0 V, and a rated value for the output voltage VO3 is 1.8 V.
The DC-DC converter CNVC1 makes the output voltage VO1 start to rise in response to a rising transition of a control signal line PON, and sets a control signal line PGOOD1 to a high level along with completion of rising of the output voltage VO1. Note that the control signal line PON is set to a high level only for a predetermined time when requesting a power-on to the power supply circuit PWC. Also, the DC-DC converter CNVC1 makes the output voltage VO1 start to fall in response to a falling transition of the control signal line PGOOD2, and sets the control signal line PGOOD1 to a low level along with completion of falling of the output voltage VO1.
The DC-DC converter CNVC2 makes the output voltage VO2 start to rise in response to a rising transition of a control signal line PGOOD1, and sets a control signal line PGOOD2 to a high level along with completion of rising of the output voltage VO2. Also, the DC-DC converter CNVC2 makes the output voltage VO2 start to fall in response to a falling transition of the control signal line PGOOD3, and sets the control signal line PGOOD2 to a low level along with completion of falling of the output voltage VO2.
The DC-DC converter CNVC3 makes the output voltage VO3 start to rise in response to a rising transition of a control signal line PGOOD2, and sets a control signal line PGOOD3 to a high level along with completion of rising of the output voltage VO3. Also, the DC-DC converter CNVC3 makes the output voltage VO3 start to fall in response to a falling transition of a control signal line POFF, and sets the control signal line PGOOD3 to a low level along with completion of falling of the output voltage VO3. Note that the control signal line POFF is set to a low level only for a predetermined time when requesting a power-off to the power supply circuit PWC.
In the power supply circuit PWC as described above, by cascade-connecting the control signal line for controlling the start sequence and the control signal line for controlling the stop sequence separately among the DC-DC converters CNVC1 to CNVC3, the start sequence and the stop sequence among the DC-DC converters CNVC1 to CNVC3 can be reversed, similarly to the power supply circuit PWA (FIG. 2). However, since it is necessary to provide the control signal line for controlling the stop sequence separately from the control signal line for controlling the start sequence, the object to decrease the number of control signal lines is not achieved. As described above, to realize a desired start sequence and a desired stop sequence among a plurality of DC-DC converters, it has been necessary to provide a large-scale, complicated control circuit and a large number of control signal lines.
Note that as prior arts related to the present embodiment, for example, there are Japanese Unexamined Patent Application Publication No. Hei04-289725 and Japanese Unexamined Patent Application Publication No. 2002-369378.